Learn how to instrument hardware from python. Learn how to attack and analyze …
Learn how to instrument hardware from python.
Learn how to attack and analyze other hardware targets using Xilinx 7-series FPGAs.
Go from zero knowledge to understanding and being able to implement HDL code in just 4 days!
Course Content
The course is suitable for both hardware and software engineers.
Students will learn a hybrid hardware/software workflow for identifying security issues.
The course covers hardware analysis and building analysis of hardware targets using FPGAs.
Students will use Python for complex algorithms and Verilog HDL for timing critical components.
The course includes CTF-style assignments that cover common flaws in real-world hardware implementations.
Topics
Common hardware vulnerabilities
FPGA Implmentation and Debugging
HDL Development
Block-Design Flow
Generation and Integration of IP
RiscV Soft Cores
RiscV Implementation and debugging
Test and Measurement Equipment (Oscilloscopes, Logic Analyzers)
Brute-Forcing Embedded Protocols
Man-in-The-Middle (MITM) of protocols
Side-Channel Analysis via a Timing Side-Channel
Glitching
Period: 4 Days
Requirements
Class Requirements
Participants should have some familiarity with scripting languages, i.e. Python. This course is suitable for people that are new to hardware security and electronics. All the theory and concepts related to electronics, HDL and debugging will be explained during course.
Hardware Requirements
Students without the hardware can complete most of the assignments either by using the Virtual Machine provided during the class or by running the Vivado Development environment locally on their systems. We do however, encourage people to purchase one of the Spearf1sh Compatible Platforms.
You will need a Digilent Arty Z7-20 or a Digilent Pynq-Z1 FPGA development board.
A working laptop capable of running virtual machines. 8GB RAM required, at a minimum.
Approximately 60 GB free space for the Virtual Machine.